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HEF4510B - BCD up/down counter

Description

The HEF4510B is an edge-triggered synchronous up/down BCD counter with a clock input (CP), an up/down count control input (UP/DN), an active LOW count enable input (CE), an asynchronous active HIGH parallel load input (PL), four parallel inputs (P0 to P3), four parallel outputs (O0 to O3), an active

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Datasheet Details

Part number HEF4510B
Manufacturer NXP
File Size 135.14 KB
Description BCD up/down counter
Datasheet download datasheet HEF4510B Datasheet
Additional preview pages of the HEF4510B datasheet.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4510B MSI BCD up/down counter Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification BCD up/down counter DESCRIPTION The HEF4510B is an edge-triggered synchronous up/down BCD counter with a clock input (CP), an up/down count control input (UP/DN), an active LOW count enable input (CE), an asynchronous active HIGH parallel load input (PL), four parallel inputs (P0 to P3), four parallel outputs (O0 to O3), an active LOW terminal count output (TC), and an overriding asynchronous master reset input (MR).
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