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74HCT193 - Presettable synchronous 4-bit binary up/down counter

Download the 74HCT193 datasheet PDF. This datasheet also covers the 74HC193 variant, as both devices belong to the same presettable synchronous 4-bit binary up/down counter family and are provided as variant models within a single manufacturer datasheet.

Description

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter.

Separate up/down clocks, CPU and CPD respectively, simplify operation.

The outputs change state synchronously with the LOW-to-HIGH transition of either clock input.

Features

  • Input levels:.
  • For 74HC193: CMOS level.
  • For 74HCT193: TTL level.
  • Synchronous reversible 4-bit binary counting.
  • Asynchronous parallel load.
  • Asynchronous reset.
  • Expandable without external logic.
  • Complies with JEDEC standard no. 7A.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V. NXP Semiconductors 74HC193; 74HCT193 Presettable synchronous 4-bit binary up/down counter.
  • Multiple package options.
  • S.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC193-NXP.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT193 Presettable synchronous 4-bit binary up/down counter nexperia
74HCT193-Q100 Presettable synchronous 4-bit binary up/down counter nexperia
74HCT193D Presettable synchronous 4-bit binary up/down counter nexperia
74HCT190 Presettable synchronous BCD decade up/down counter Philips
74HCT191 Presettable synchronous 4-bit binary up/down counter Philips

Other Datasheets by NXP Semiconductors

Part Number Description
74HCT11 Triple 3-input AND gate
74HCT123 Dual retriggerable monostable multivibrator
74HCT123-Q100 Dual retriggerable monostable multivibrator
74HCT125 Quad buffer/line driver
74HCT132 Quad 2-input NAND Schmitt trigger

Full PDF Text Transcription

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74HC193; 74HCT193 Presettable synchronous 4-bit binary up/down counter Rev. 5 — 29 January 2016 Product data sheet 1. General description The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD is held HIGH, the device will count up. If the CPD clock is pulsed while CPU is held HIGH, the device will count down. Only one clock input can be held HIGH at any time to guarantee predictable behavior. The device can be cleared at any time by the asynchronous master reset input (MR); it may also be loaded in parallel by activating the asynchronous parallel load input (PL).
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