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SY10E111 - 1:9 DIFFERENTIAL CLOCK DRIVER

Download the SY10E111 datasheet PDF. This datasheet also covers the SY100E111 variant, as both devices belong to the same 1:9 differential clock driver family and are provided as variant models within a single manufacturer datasheet.

General Description

The SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distribution in new, highperformance ECL systems.

They accept one differential or single-ended input, with VBB used for single-ended operation.

The signal is fanned out to nine identical differential outputs.

Key Features

  • s Low skew s Extended 100E VEE range of.
  • 4.2V to.
  • 5.5V s Guaranteed skew limits s Differential design s VBB output s Enable input s Fully compatible with industry standard 10KH, 100K I/O levels s 75KΩ input pulldown resistors s Fully compatible with ON Semiconductor MC10E/100E111 s Available in 28-pin PLCC package BLOCK.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SY100E111_MicrelSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SY10E111
Manufacturer Micrel Semiconductor
File Size 89.41 KB
Description 1:9 DIFFERENTIAL CLOCK DRIVER
Datasheet download datasheet SY10E111 Datasheet

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Other Datasheets by Micrel Semiconductor

Part Number Description
SY10E111A 1:9 DIFFERENTIAL CLOCK DRIVER
SY10E111AL 1:9 DIFFERENTIAL CLOCK DRIVER
SY10E112 QUAD DRIVER
SY10E116 QUINT DIFFERENTIAL LINE RECEIVER
SY10E101 QUAD 4-INPUT OR/NOR GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS 1:9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE SY10E111 SY1S0YE10101E1111 SY100E111 FEATURES s Low skew s Extended 100E VEE range of –4.2V to –5.5V s Guaranteed skew limits s Differential design s VBB output s Enable input s Fully compatible with industry standard 10KH, 100K I/O levels s 75KΩ input pulldown resistors s Fully compatible with ON Semiconductor MC10E/100E111 s Available in 28-pin PLCC package BLOCK DIAGRAM Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 IN Q4 IN Q4 Q5 EN Q5 Q6 Q6 Q7 Q7 Q8 VBB Q8 DESCRIPTION The SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distribution in new, highperformance ECL systems. They accept one differential or single-ended input, with VBB used for single-ended operation.