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SY100S891 - 5-BIT Registered Transceiver

General Description

s 25Ω cut-off bus outputs s 50Ω receiver outputs s Transmit and receive registers with separate clocks s 1500ps max.

delay from CLK1 to Bus Outputs (BUS) s 1500ps max.

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Datasheet Details

Part number SY100S891
Manufacturer Micrel Semiconductor
File Size 65.73 KB
Description 5-BIT Registered Transceiver
Datasheet download datasheet SY100S891 Datasheet

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Micrel, Inc. 5-BIT REGISTERED TRANSCEIVER SY100S891 SY100S891 FEATURES DESCRIPTION s 25Ω cut-off bus outputs s 50Ω receiver outputs s Transmit and receive registers with separate clocks s 1500ps max. delay from CLK1 to Bus Outputs (BUS) s 1500ps max. delay from CLK2 to Receiver Outputs (Q) s Individual bus enable pins s Internal 75KΩ input pull-down resistors s Voltage and temperature compensation for improved noise immunity s Industry standard 100K ECL levels s Extended supply voltage option: VEE = –4.2V to –5.5V s Available in 28-pin PLCC package The SY100S891 is a 5-bit registered transceiver containing five bus transceivers with both transmit and receive registers.