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SY100EL35 - JK FLIP-FLOP

Description

The SY10/100EL35 are high-speed JK Flip-Flops.

The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave and, thus, the outputs, upon a positive transition of the clock.

The reset pin is asynchronous and is activated with a logic HIGH.

Features

  • s 525ps propagation delay s 2.2GHz toggle frequency s High bandwidth output transistions s Internal 75KΩ input pull-down resistors s Available in 8-pin SOIC package.

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Datasheet preview – SY100EL35

Datasheet Details

Part number SY100EL35
Manufacturer Micrel Semiconductor
File Size 73.39 KB
Description JK FLIP-FLOP
Datasheet download datasheet SY100EL35 Datasheet
Additional preview pages of the SY100EL35 datasheet.

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Full PDF Text Transcription

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Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS JK FLIP-FLOP SY10EL35 SY1S0YE10L03E5L35 SY100EL35 FEATURES s 525ps propagation delay s 2.2GHz toggle frequency s High bandwidth output transistions s Internal 75KΩ input pull-down resistors s Available in 8-pin SOIC package DESCRIPTION The SY10/100EL35 are high-speed JK Flip-Flops. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave and, thus, the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH. TRUTH TABLE(1) JK LL LH HL HH XX NOTE: 1. Z = LOW-to-HIGH transition. R L L L L H CLK Z Z Z Z X Qn+1 Qn L H Qn L M9999-121205 hbwhelp@micrel.com or (408) 955-1690 11 Rev.
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