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HCTS109MS - Radiation Hardened Dual JK Flip Flop

Description

The Intersil HCTS109MS is a Radiation Hardened Dual JK Flip Flop with set and reset.

The flip flop changes state with the positive transition of the clock (CP1 or CP2).

The HCTS109MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.

Features

  • 3 Micron Radiation Hardened SOS CMOS.
  • Total Dose 200K RAD (Si).
  • SEP Effective LET No Upsets: >100 MEV-cm2/mg.
  • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ).
  • Dose Rate Survivability: >1 x 1012 RAD (Si)/s.
  • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse.
  • Latch-Up Free Under Any Conditions.
  • Military Temperature Range: -55 oC Q1 to +125oC Q1 GND.
  • Significant Power Reduction Compared to LSTTL ICs.

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Full PDF Text Transcription

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HCTS109MS September 1995 Radiation Hardened Dual JK Flip Flop Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW RI J1 K1 CP1 S1 1 2 3 4 5 6 7 8 16 VCC 15 R2 14 J2 13 K2 12 CP2 11 S2 10 Q2 9 Q2 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55 oC Q1 to +125oC Q1 GND • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • LSTTL Input Logic Compatibility - VIL = 0.
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