IS42S16400D Datasheet PDF - Integrated Silicon Solution 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM Specs

IS42S16400D - 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

Datasheet Summary

Description

A0-A11 BA0, BA1 DQ0 to DQ15 CLK CKE CS RAS CAS Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE LDQM UDQM VDD GND VDDQ GNDQ NC Write Enable Lower Bye, Input/Output Mask Upper Bye, Input/Output Mask Pow

Features

Clock frequency: 166, 143 MHz.
Fully synchronous; all signals referenced to a positive clock edge.
Internal bank for hiding row access/precharge.
Single 3.3V power supply www. DataSheet4U. com.
LVTTL interface ISSI JULY 2006 ®.

Datasheet Details

Part number	IS42S16400D
Manufacturer	Integrated Silicon Solution
File Size	631.42 KB
Description	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
Datasheet	IS42S16400D Datasheet
Additional preview pages of the IS42S16400D datasheet.

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IS42S16400D 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM FEATURES • Clock frequency: 166, 143 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single 3.3V power supply www.DataSheet4U.com • LVTTL interface ISSI JULY 2006 ® OVERVIEW ISSI's 64Mb Synchronous DRAM IS42S16400D is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

Published: May 14, 2010 |