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2.5V LVDS 1:6 CLOCK BUFFER TERABUFFER™ II
FEATURES:
• • • • • • • • • • • • Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion < 125ps (max) High speed propagation delay < 1.75ns (max) Additive phase jitter, RMS 0.159ps (typical) @ 125MHz Up to 1GHz operation Selectable inputs Hot insertable and over-voltage tolerant inputs 3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input interface Selectable differential inputs to six LVDS outputs Power-down mode 2.5V VDD Available in VFQFPN package
IDT5T9306
DESCRIPTION:
The IDT5T9306 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs.