ICS9FG107 Datasheet PDF (Programmable FTG for Differential CPU) | Download Integrated Circuit Systems ICS9FG107

ICS9FG107 - Programmable FTG for Differential CPU

Description

PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PIN NAME XIN/CLKIN X2 VDD GND FS2/REFOUT GND FS0/PCICLK_F PCICLK0 PCICLK1 VDD OE_6 DIF_6 DIF_6# VDD GND OE_5 DIF_5 DIF_5# VDD DIF_4 DIF_4# OE_4 SDATA SCLK PIN TYPE IN OUT PWR PWR I/O PWR I/O OUT O

Features

Generates common CPU/PCI Express frequencies from 14.318 MHz or 25 MHz.
Crystal or reference input.
7 - 0.7V current-mode differential output pairs.
3 - 33MHz PCI outputs.
1 - REFOUT.
Supports Serial-ATA at 100 MHz.
Two spread spectrum modes: 0 to -0.5 downspread and +/-0.25% centerspread.
Unused inputs may be disabled in either driven or Hi-Z state for power management. Key Specifications:.
Output cycle-to-cycle.

Datasheet Details

Part number	ICS9FG107
Manufacturer	Integrated Circuit Systems
File Size	151.00 KB
Description	Programmable FTG for Differential CPU
Datasheet	ICS9FG107 Datasheet
Additional preview pages of the ICS9FG107 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS9FG107 Programmable FTG for Differential CPU, PCI Express* & SATA Clocks Recommended Application: Pin Configuration Frequency Timing Generator for Differential CPU, PCI Express XIN/CLKIN & SATA clocks Features: • Generates common CPU/PCI Express frequencies from 14.318 MHz or 25 MHz • Crystal or reference input • 7 - 0.7V current-mode differential output pairs • 3 - 33MHz PCI outputs • 1 - REFOUT • Supports Serial-ATA at 100 MHz • Two spread spectrum modes: 0 to -0.5 downspread and +/-0.25% centerspread • Unused inputs may be disabled in either driven or Hi-Z state for power management.

Published: Jun 17, 2006 |