Datasheet4U Logo Datasheet4U.com

ICS5310I-01 - ECL/LVPECL FANOUT BUFFER

Description

The ICS85310I-01 is a low skew, high performance 1-to-10 Differential-to-2.5V/3.3V ECL/ HiPerClockS™ LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Perfor mance Clock Solutions from ICS.

The CLKx, nCLKx pairs can accept most standard differential input levels.

Features

  • Ten differential 2.5V/3.3V LVPECL / ECL outputs.
  • Two selectable differential input pairs.
  • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • Maximum output frequency: 700MHz.
  • Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input.
  • Output skew: 30ps (typical).
  • Part-to-part skew: 140ps (typical).
  • Propagation delay: 2ns (typical).

📥 Download Datasheet

Datasheet Details

Part number ICS5310I-01
Manufacturer Integrated Circuit Systems
File Size 216.12 KB
Description ECL/LVPECL FANOUT BUFFER
Datasheet download datasheet ICS5310I-01 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ICS501 PLL CLOCK MULTIPLIER IDT
ICS501 PLL CLOCK MULTIPLIER Renesas
ICS501A PLL CLOCK MULTIPLIER Renesas
ICS501A PLL CLOCK MULTIPLIER IDT
ICS501B PLL CLOCK MULTIPLIER Renesas

Other Datasheets by Integrated Circuit Systems

Part Number Description
ICS5310I-31 DIFFERENTIAL-TO-ECL/LVPECL FANOUT BUFFER
ICS5314I-01 DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
ICS5314I-11 DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
ICS5342 16-Bit Integrated Clock-LUT-DAC
ICS501 LOCO PLL Clock Multiplier

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS85310I-01 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER FEATURES • Ten differential 2.5V/3.3V LVPECL / ECL outputs • Two selectable differential input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input • Output skew: 30ps (typical) • Part-to-part skew: 140ps (typical) • Propagation delay: 2ns (typical) • Additive phase jitter, RMS: <0.13ps (typical) • LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V • ECL mode operating voltage supply range: VCC = 0V, VEE = -2.375V to -3.
Published: |