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IS67WVE4M16ALL - 1.8V Core Async/Page PSRAM

Download the IS67WVE4M16ALL datasheet PDF. This datasheet also covers the IS66WVE4M16ALL variant, as both devices belong to the same 1.8v core async/page psram family and are provided as variant models within a single manufacturer datasheet.

Description

PSRAM products are high-speed, CMOS pseudo-static random access memory developed for low-power, portable applications.

The 64Mb DRAM core device is organized as 4 Meg x 16 bits.

Features

  • Asynchronous and page mode interface.
  • Dual voltage rails for optional performance.
  • VDD 1.8V, VDDQ 1.8V.
  • Page mode read access.
  • Interpage Read access : 70ns.
  • Intrapage Read access : 20ns.
  • Low Power Consumption.
  • Asynchronous Operation < 30 mA.
  • Intrapage Read < 18mA.
  • Standby < 180 uA (max. ).
  • Deep power-down (DPD) < 3uA (Typ).
  • Low Power Feature.
  • Temperature Controlled Refresh.
  • Partial Array Refresh.
  • Deep power-down (DPD) mo.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS66WVE4M16ALL-ISSI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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IS6010 OPTICALLY COUPLED BILATERAL SWITCH NON-ZERO CROSSING TRIAC ETC
IS6015 OPTICALLY COUPLED BILATERAL SWITCH NON-ZERO CROSSING TRIAC ETC

Other Datasheets by ISSI (now Infineon)

Part Number Description
IS67WVE4M16EALL 64Mb Async/Page PSRAM
IS67WVE4M16EBLL 64Mb Async/Page PSRAM
IS67WVE4M16ECLL 64Mb Async/Page PSRAM
IS67WVE4M16TALL 64Mb Async/Page PSRAM
IS67WVE4M16TBLL 64Mb Async/Page PSRAM

Full PDF Text Transcription

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IS66WVE4M16ALL IS67WVE4M16ALL 1.8V Core Async/Page PSRAM Overview The IS66WVE4M16ALL is an integrated memory device containing 64Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 4M words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core. Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  VDD 1.8V, VDDQ 1.
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