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IN74ACT112 - Dual J-K Negative-Edge-Triggered Flip-Flop

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Datasheet Details

Part number IN74ACT112
Manufacturer IK Semiconductor
File Size 299.28 KB
Description Dual J-K Negative-Edge-Triggered Flip-Flop
Datasheet download datasheet IN74ACT112 Datasheet

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TECHNICAL DATA IN74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112. The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 µA; 0.
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