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IDT74AHCT373 - High Speed CMOS Octal Transparent Latch

Download the IDT74AHCT373 datasheet PDF. This datasheet also covers the IDT54AHCT373 variant, as both devices belong to the same high speed cmos octal transparent latch family and are provided as variant models within a single manufacturer datasheet.

Description

The IDT54/74AHCT373 are 8-bit latches built using advanced CEMOS'", a dual metal CMOS technology.

This octal latch has 3-state output and is intended for bus-oriented applications.

The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH.

Features

  • Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes.
  • 10ns typical data to output delay.
  • IOL = 14mA over full military temperature range.
  • CMOS power levels (5p. W typo static).
  • Both CMOS and TTL output compatible.
  • Substantially lower input current levels than ALS (5p. A max. ).
  • Octal transparent latch with enable.
  • 100% product assurance screening to MIL-STD-883, Class B is available.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT54AHCT373-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT74AHCT373
Manufacturer IDT
File Size 184.48 KB
Description High Speed CMOS Octal Transparent Latch
Datasheet download datasheet IDT74AHCT373 Datasheet

Full PDF Text Transcription

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FEATURES: • Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes • 10ns typical data to output delay • IOL = 14mA over full military temperature range • CMOS power levels (5p.W typo static) • Both CMOS and TTL output compatible • Substantially lower input current levels than ALS (5p.A max.) • Octal transparent latch with enable • 100% product assurance screening to MIL-STD-883, Class B is available • JEDEC standard pinout for DIP and LCC DESCRIPTION: The IDT54/74AHCT373 are 8-bit latches built using advanced CEMOS'", a dual metal CMOS technology. This octal latch has 3-state output and is intended for bus-oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH.
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