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9LP525BG - 56-pin CK505 Clock

Features

  • 2 - CPU differential low power push-pull pairs.
  • 7- SRC differential low power push-pull pairs.
  • 1 - CPU/SRC selectable differential low power push-pull pair.
  • 1 - SRC/DOT selectable differential low power push-pull pair.
  • 5 - PCI, 33MHz.
  • 1 - PCI_F, 33MHz free running.
  • 1 - USB, 48MHz.
  • 1 - REF, 14.318MHz Key Specifications:.
  • CPU outputs cycle-cycle jitter < 85ps.
  • SRC output cycle-cycle jitter < 125ps.

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Datasheet Details

Part number 9LP525BG
Manufacturer IDT
File Size 226.10 KB
Description 56-pin CK505 Clock
Datasheet download datasheet 9LP525BG Datasheet

Full PDF Text Transcription

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DATASHEET 56-pin CK505 for Intel Desktop Systems ICS9LP525-2 Recommended Application: CK505 clock, 56-pin Intel Yellow Cover part Output Features: • 2 - CPU differential low power push-pull pairs • 7- SRC differential low power push-pull pairs • 1 - CPU/SRC selectable differential low power push-pull pair • 1 - SRC/DOT selectable differential low power push-pull pair • 5 - PCI, 33MHz • 1 - PCI_F, 33MHz free running • 1 - USB, 48MHz • 1 - REF, 14.318MHz Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps • PCI outputs cycle-cycle jitter < 250ps • +/- 100ppm frequency accuracy on all outputs • SRC are PCIe Gen2 compliant Features/Benefits: • Supports spread spectrum modulation, default is 0.5% down spread • Uses external 14.
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