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9FGL0851 - 8-Output 3.3V PCIe Clock Generator

This page provides the datasheet information for the 9FGL0851, a member of the 9FGL0841 8-Output 3.3V PCIe Clock Generator family.

Description

The 9FGL0841 / 9FGL0851 devices are 8-output clock generators in IDT's 3.3V Full-Featured PCIe family.

Each output has a dedicated OE# pin for clock management.Two different spread spectrum levels in addition to spread off are supported.

4 Common Cl

Features

  • 8 100MHz Low-Power HCSL (LP-HCSL) DIF pairs:.
  • 9FGL0841 default Zo = 100Ω.
  • 9FGL0851 default Zo = 85Ω.
  • 1 3.3V LVCMOS REF output; Wake-On-LAN (WOL) support.
  • See AN-891 for easy AC-coupling to other logic families Key Specifications.
  • PCIe Gen1.
  • 4 CC compliant; Gen2.
  • 3 SRIS compliant.
  • DIF cycle-to-cycle jitter < 50ps.

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Datasheet preview – 9FGL0851

Datasheet Details

Part number 9FGL0851
Manufacturer IDT
File Size 323.08 KB
Description 8-Output 3.3V PCIe Clock Generator
Datasheet download datasheet 9FGL0851 Datasheet
Additional preview pages of the 9FGL0851 datasheet.

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Full PDF Text Transcription

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8-Output 3.3V PCIe Clock Generator 9FGL0841 / 9FGL0851 Datasheet Description The 9FGL0841 / 9FGL0851 devices are 8-output clock generators in IDT's 3.3V Full-Featured PCIe family. Each output has a dedicated OE# pin for clock management.Two different spread spectrum levels in addition to spread off are supported. The 9FGL0841 / 9FGL0851 supports PCIe Gen1–4 Common Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. Typical Applications ▪ Servers/High-Performance Computing/Accelerators ▪ Storage ▪ Embedded systems/Industrial control Output Features ▪ 8 100MHz Low-Power HCSL (LP-HCSL) DIF pairs: • 9FGL0841 default Zo = 100Ω • 9FGL0851 default Zo = 85Ω ▪ 1 3.
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