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HY512264
128Kx16, Extended Data Out mode
DESCRIPTION
This family is a 4M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. In dependant read and write of upper and lower byte is controlled by 2 separate /CAS inputs. Optional features are access time(50, 60 or 70ns), package type(SOJ, TSOP-II), and power onsumption (Normal or Low power with self refresh). Hyundai’s advanced circuit design and process technology allow this device to achieve high bandwidth, low power consumption and high reliability.