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HD74HCT245 - Octal Bus Transceivers (with 3-state outputs)

Description

This device has an active low enable input G and a direction control input (DIR).

When DIR is high, data flows from the A inputs to the B outputs.

When DIR is low, data flows from the B inputs to the A outputs.

Features

  • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Enable G L L H H : L : X : High level Low level Irrelevant Direction Control DIR L H X Operation B data t.

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HCT240 Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)
HD74HCT241 Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs)
HD74HCT242 Quad. Bus Transceivers (with 3-state outputs)
HD74HCT243 Quad. Bus Transceivers (with 3-state outputs)
HD74HCT244 Octal Buffers/Line Drivers/Line Receivers(noninverted 3-state outputs)

Full PDF Text Transcription

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HD74HCT245 Octal Bus Transceivers (with 3-state outputs) Description This device has an active low enable input G and a direction control input (DIR). When DIR is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. The HD74HCT245 transfers true data from one bus to the other. This device does not have schmitt trigger inputs. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.
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