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HD74HCT242 - Quad. Bus Transceivers (with 3-state outputs)

Description

The HD74HCT242 is an inverting buffer and the HD74HCT243 is a noninverting buffer.

Each device has one active high enable (GBA), and one active low enable (GAB).

GBA enables the A outputs and GAB enables the B outputs.

Features

  • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 9.5 ns typ (C L = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table HD74HCT242 Control Inputs GAB H L H L I O O Z : : : : GBA H H L L Input Output Inverting Output High Im.

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HCT240 Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)
HD74HCT241 Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs)
HD74HCT243 Quad. Bus Transceivers (with 3-state outputs)
HD74HCT244 Octal Buffers/Line Drivers/Line Receivers(noninverted 3-state outputs)
HD74HCT245 Octal Bus Transceivers (with 3-state outputs)

Full PDF Text Transcription

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HD74HCT242/HD74HCT243 Quad. Bus Transceivers (with 3-state outputs) Description The HD74HCT242 is an inverting buffer and the HD74HCT243 is a noninverting buffer. Each device has one active high enable (GBA), and one active low enable (GAB). GBA enables the A outputs and GAB enables the B outputs. The device does not have schmitt trigger inputs. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 9.5 ns typ (C L = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.
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