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HD74HC131 - 3-to-8-line Decoder/Demultiplexer

Description

The HD74HC131 is 3-to-8 linedecoder.

It has Address select inputs (A,B,C) and D type register.

Address select data store to D type registers, during the positive going transition of the clock pulse.

Features

  • High Speed Operation: tpd (CLK to Y) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 V to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC131 Function Table Inputs Enable CLK G1 X X X L H H H H H H H H L H G2 H X L L L L L L L L L Select C X X L L L L H H H H X B X X L L H H L L H H X A X X L H L H L H L H X Outputs Y0 H H L H H H H H H.

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📁 Similar Datasheet

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HC132 Quad. 2-input NAND Schmitt Triggers
HD74HC133 13-input NAND Gate
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Full PDF Text Transcription

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HD74HC131 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse. Output control (G 1, G2) are independent of select input and CLK input, and when G1 is low or G2 = High, all outputs is high.
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