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HD74AC539 - Dual 1-of-4 Decoder with 3-State Output

Description

The HD74AC539 contains two inpedendent decoders.

Each accepts two Address (A 0, A1) input signals and decodes them to select one of four mutually exclusive outputs.

A polarity control input (P) determines whether the outputs are active HIGH (P = L) or active LOW (P = H).

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Other Datasheets by Hitachi Semiconductor (now Renesas)

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Full PDF Text Transcription

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HD74AC539 Dual 1-of-4 Decoder with 3-State Output Description The HD74AC539 contains two inpedendent decoders. Each accepts two Address (A 0, A1) input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active HIGH (P = L) or active LOW (P = H). An active LOW input Enable (E) is available for data demultiplexing; data is routed to the selected output in non-inverted form in the active LOW mode or in inverted form in the active HIGH mode. A HIGH signal on the active LOW Output Enable ( OE) input forces the 3-state outputs to the high impedance state.
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