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FDV303N - N-Channel Digital FET

General Description

These N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is tailored to minimize on-state resistance at low gate drive conditions.

Key Features

  • 25 V, 0.68 A continuous, 2 A Peak. RDS(ON) = 0.45 Ω @ VGS = 4.5 V RDS(ON) = 0.6 Ω @ VGS= 2.7 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Compact industry standard SOT-23 surface mount pa.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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FDV303N Digital FET, N-Channel General Description These N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery circuits using either one lithium or three cadmium or NMH cells. It can be used as an inverter or for high-efficiency miniature discrete DC/DC conversion in compact portable electronic devices like cellular phones and pagers. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts. July 2014 Features 25 V, 0.68 A continuous, 2 A Peak. RDS(ON) = 0.45 Ω @ VGS = 4.5 V RDS(ON) = 0.6 Ω @ VGS= 2.7 V.