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74VHC138 - 3-to-8 Decoder/Demultiplexer

General Description

The VHC138 is an advanced high speed CMOS 3-to-8 decoder/demultiplexer fabricated with silicon gate CMOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Key Features

  • s High Speed: tPD = 5.7ns (typ) at TA = 25°C s Low power dissipation: ICC = 4 µA (max. ) at TA = 25°C s High noise immunity: VNIH = VNIL = 28% VCC (min. ) s Power down protection provided on all inputs s Pin and function compatible with 74HC138 Ordering Code: Order Number Package Number Package.

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Full PDF Text Transcription for 74VHC138 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for 74VHC138. For precise diagrams, tables, and layout, please refer to the original PDF.

74VHC138 3-to-8 Decoder/Demultiplexer November 1992 Revised April 1999 74VHC138 3-to-8 Decoder/Demultiplexer General Description The VHC138 is an advanced high speed CMOS...

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tiplexer General Description The VHC138 is an advanced high speed CMOS 3-to-8 decoder/demultiplexer fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 binary select inputs (A0, A1 and A2) determine which one of the outputs (O0–O7) will go LOW. When enable input E3 is held LOW or either E1 or E2 is held HIGH, decoding function is inhibited and all outputs go HIGH. E3, E1 and E2 inputs are provided to ease cascade connection and for use as an address decoder for memory sys