CMP0417AAx-E Datasheet | FIDELIX

description & MRS update timing Minor Changes Added G(Pb-Free) and H(Pb-Free & Halogen Free) descriptions Removed the MRS DPD function Minor Changes Removed 60ns descriptions History Draft date Dec. 22nd, 2003 Mar. 10th, 2004 Jul. 6th, 2004 Nov. 8th, 2004 Remark Preliminary Final Final Final Oct. 26th, 2005 Final Aug. 22nd, 2006 Final Revision 0.5 Aug. 2006 FEATURES - Process Technology : Full CMOS CMOS LPRAM 256K x 16 bit Super Low Power and Low Voltage Full CMOS RAM .. - Three state output and TTL patible - Package Type : 48-FBGA-6.00x8.00 mm2 - Separated I/O power(VCCQ) & Core Power(VCC) - Page read/write operation up to 16 words (CMP0417AA4, CMP0417AA5) - Organization : 256K x 16 - Power Supply Voltage : 2.7~3.3V - Low Power & Page Modes CMP0417AA1 : support the PASR function CMP0417AA2 : support the DPD function CMP0417AA4 : support the PASR/PAGE function CMP0417AA5 : support the DPD/PAGE function - DPD mode when /ZZ goes low (CMP0417AA2,...