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XRK69774 - 1:14 LVCMOS PLL CLOCK GENERATOR

Description

The XRK69774 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications.

Features

  • Fully Integrated PLL.
  • 15 LVCMOS outputs.
  • 2 banks with 5 outputs and 1 with 4 outputs each 1 dedicated feedback for frequency control Output Frequency of each Bank can be individually controlled.
  • VCO Range 200MHz to 500MHz Output freq. range: 8.33MHz to 125MHz Max Output Skew of 175ps Max Cycle-to-cycle jitter: 90ps LVCMOS inputs for reference clock source.

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www.DataSheet4U.com APRIL 2006 PRELIMINARY XRK69774 REV. P1.0.1 1:14 LVCMOS PLL CLOCK GENERATOR GENERAL DESCRIPTION The XRK69774 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications. The XRK69774 can select between one of two reference inputs and provides 15 LVCMOS outputs 14 outputs (2 banks of 5 and 1 bank of 4) for clock distribution and 1 for feedback. The XRK69774 has two LVCMOS inputs to support clock redundancy. Switching the internal reference clock is controlled by the control input, CLK_SEL. The XRK69774 uses PLL technology to frequency lock its outputs to the input reference clock. The divider in the feedback path will determine the frequency of the VCO.
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