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CY14ME064Q - 64-Kbit (8 K x 8) SPI nvSRAM

This page provides the datasheet information for the CY14ME064Q, a member of the CY14MB064Q 64-Kbit (8 K x 8) SPI nvSRAM family.

Description

The Cypress CY14MX064Q combines a 64 Kbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface.

The memory is organized as 8K words of 8 bits each.

Features

  • 64-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 8K × 8.
  • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE).
  • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL).
  • Support automatic STORE on power-down with a small capacitor (except for CY14MX064Q1A).
  • High reliability.
  • Infinite rea.

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Datasheet preview – CY14ME064Q

Datasheet Details

Part number CY14ME064Q
Manufacturer Cypress
File Size 1.03 MB
Description 64-Kbit (8 K x 8) SPI nvSRAM
Datasheet download datasheet CY14ME064Q Datasheet
Additional preview pages of the CY14ME064Q datasheet.

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Full PDF Text Transcription

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CY14MB064Q CY14ME064Q 64-Kbit (8K × 8) SPI nvSRAM 64-Kbit (8K × 8) SPI nvSRAM Features ■ 64-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 8K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE) ❐ RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL) ❐ Support automatic STORE on power-down with a small capacitor (except for CY14MX064Q1A) ■ High reliability ❐ Infinite read, write, and RECALL cycles ❐ 1million STORE cycles to QuantumTrap ❐ Data retention: 20 years at 85 C ■ High speed serial peripheral interface (SPI) ❐ 40-MHz clock rate SPI write and read with zero cycle delay ❐ Supports SPI mode 0 (0,
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