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CY7C198 - 32K x 8 Static RAM

Download the CY7C198 datasheet PDF. This datasheet also covers the CY7 variant, as both devices belong to the same 32k x 8 static ram family and are provided as variant models within a single manufacturer datasheet.

Description

output pins (I/O0 through I/O7) is written intothememorylocationaddressedbythe address present on the address pins (A0 through A14).

Reading the device is acĆ complishedbyselectingthedeviceandenĆ abling the outputs, CE and OE active LOW, while WE remains inactive or HIGH.

Features

  • D D D D D D D High speed Ċ 15 ns CMOS for optimum speed/power Low active power Ċ 990 mW Low standby power Ċ 195 mW Easy memory expansion with CE and OE features TTLĆcompatible inputs and outputs Automatic powerĆdown when deselected The CY7C198 is a highĆperformance CMOS static RAM organized as 32,768 words by8bits. Easymemoryexpansionis provided by an active LOW chip enable (CE)andactiveLOWoutputenable(OE) and threeĆstate drivers. This device has an automatic powerĆdown feature, reducing the po.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7-C198.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
7c198: 10/25/89 Revision: February 29, 1996 Features D D D D D D D High speed Ċ 15 ns CMOS for optimum speed/power Low active power Ċ 990 mW Low standby power Ċ 195 mW Easy memory expansion with CE and OE features TTLĆcompatible inputs and outputs Automatic powerĆdown when deselected The CY7C198 is a highĆperformance CMOS static RAM organized as 32,768 words by8bits.Easymemoryexpansionis provided by an active LOW chip enable (CE)andactiveLOWoutputenable(OE) and threeĆstate drivers. This device has an automatic powerĆdown feature, reducing the power consumption by 80% when deĆ selected. The CY7C198 is available in a 600ĆmilĆwide cerDIP and LCC package and a 32Ćlead TSOP package. An active LOW write enable signal (WE) controls the writing/reading operation of the memory.
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