Datasheet4U Logo Datasheet4U.com

CY7C1420KV18 Datasheet 36-Mbit DDR II SRAM Two-Word Burst Architecture

Manufacturer: Cypress (now Infineon)

Download the CY7C1420KV18 datasheet PDF. This datasheet also includes the CY7C1418KV18 variant, as both parts are published together in a single manufacturer document.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1418KV18-CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

The CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture.

The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter.

Addresses for read and write are latched on alternate rising edges of the input (K) clock.

Overview

CY7C1418KV18/CY7C1420KV18 36-Mbit DDR II SRAM Two-Word Burst Architecture 36-Mbit DDR II SRAM Two-Word Burst.

Key Features

  • 36-Mbit density (2M × 18, 1M × 36).
  • 333 MHz clock for high bandwidth.
  • Two-word burst for reducing address bus frequency.
  • Double data rate (DDR) interfaces (data transferred at 666 MHz) at 333 MHz.
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches.
  • Echo clocks (CQ and CQ) simplify data capture in high speed systems.
  • Synchronous in.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1420AV18 (CY7C14xxAV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1420BV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1420JV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C142 2K x 8 Dual-Port Static RAM
CY7C1421AV18 1.8V Synchronous Pipelined SRAM
CY7C1422AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1422BV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1422JV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1423AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1423BV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture