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CY7C1415JV18 - (CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture

Download the CY7C1415JV18 datasheet PDF. This datasheet also covers the CY7C1413JV18 variant, as both devices belong to the same (cy7c14xxjv18) 36-mbit qdr-ii sram 4-word burst architecture family and are provided as variant models within a single manufacturer datasheet.

Description

The CY7C1411JV18, CY7C1426JV18, CY7C1413JV18, and CY7C1415JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture.

QDR-II architecture consists of two separate ports to access the memory array.

Features

  • Configurations CY7C1411JV18.
  • 4M x 8 CY7C1426JV18.
  • 4M x 9 CY7C1413JV18.
  • 2M x 18 CY7C1415JV18.
  • 1M x 36 Separate independent read and write data ports.
  • Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address bus frequency Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 600 MHz) at 300 MHz Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1413JV18_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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CY7C1011G 2-Mbit (128K words x 16 bit) Static RAM Cypress
CY7C1041G 4-Mbit (256K words x 16 bit) Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1415AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1415BV18 (CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1415KV18 36-Mbit QDR II SRAM Four-Word Burst Architecture
CY7C141 1K x 8 Dual-Port Static RAM
CY7C1410AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 2-Word Burst Architecture

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