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CY7C1351F - 4-Mb (128K x 36) Flow-through SRAM

Description

1] The CY7C1351F is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM desi

Features

  • Can support up to 133-MHz bus operations with zero wait states.
  • Data is transferred on every clock.
  • Pin compatible and functionally equivalent to ZBT™ devices.
  • Internally self-timed output buffer control to eliminate the need to use OE.
  • Registered inputs for flow-through operation.
  • Byte Write capability.
  • 128K x 36 common I/O architecture.
  • 2.5V / 3.3V I/O power supply.
  • Fast clock-to-output times.
  • 6.5 ns (fo.

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Full PDF Text Transcription

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CY7C1351F 4-Mb (128K x 36) Flow-through SRAM with NoBL™ Architecture Features • Can support up to 133-MHz bus operations with zero wait states — Data is transferred on every clock • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Registered inputs for flow-through operation • Byte Write capability • 128K x 36 common I/O architecture • 2.5V / 3.3V I/O power supply • Fast clock-to-output times — 6.5 ns (for 133-MHz device) — 7.5 ns (for 117-MHz device) — 8.0 ns (for 100-MHz device) — 11.
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