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CY7C1041CV33 Datasheet 256K x 16 Static RAM

Manufacturer: Cypress (now Infineon)

Download the CY7C1041CV33 datasheet PDF. This datasheet also includes the CY7 variant, as both parts are published together in a single manufacturer document.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7-C1041CV.pdf) that lists specifications for multiple related part numbers.

General Description

of Read and Write modes.

The input/output pins (I/O0–I/O15) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a Write operation (CE LOW, and WE LOW).

The CY7C1041CV33 is available in a standard 44-pin 400-mil-wide body width SOJ and 44-pin TSOP II package with center power and ground (revolutionary) pinout, as well as a 48-ball fine-pitch ball grid array (FBGA) package.

Overview

CY7C1041CV33 256K x 16 Static RAM.

Key Features

  • Pin equivalent to CY7C1041BV33.
  • High speed.
  • tAA = 10 ns.
  • Low active power.
  • 324 mW (max. ).
  • 2.0V data retention.
  • Automatic power-down when deselected.
  • TTL-compatible inputs and outputs.
  • Easy memory expansion with CE and OE features HIGH Enable (BHE) is LOW, then data from I/O pins (I/O8.
  • I/O15) is written into the location specified on the address pins (A0.
  • A17). Reading from the device is accomplished.