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CY7C09199V - (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM

Download the CY7C09199V datasheet PDF. This datasheet also covers the CY7C09079V variant, as both devices belong to the same (cy7c09xx9v) 3.3v 32k/64k/128k x 8/9 synchronous dual-port static ram family and are provided as variant models within a single manufacturer datasheet.

Description

The CY7C09079V/89V/99V and CY7C09179V/89V/99V are high-speed synchronous CMOS 32K, 64K, and 128K x 8/9 dual-port static RAMs.

Features

  • True Dual-Ported memory cells which allow simultaneous access of the same memory location.
  • 6 Flow-Through/Pipelined devices.
  • 32K x 8/9 organizations (CY7C09079V/179V).
  • 64K x 8/9 organizations (CY7C09089V/189V).
  • 128K x 8/9 organizations (CY7C09099V/199V).
  • 3 Modes.
  • Flow-Through.
  • Pipelined.
  • Burst.
  • Pipelined output mode on both ports allows fast 100-MHz operation.
  • 0.35-micron CMOS for optimum speed/po.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C09079V_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number CY7C09199V
Manufacturer Cypress (Infineon)
File Size 509.94 KB
Description (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM
Datasheet download datasheet CY7C09199V Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com 25/0251 CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 6 Flow-Through/Pipelined devices — 32K x 8/9 organizations (CY7C09079V/179V) — 64K x 8/9 organizations (CY7C09089V/189V) — 128K x 8/9 organizations (CY7C09099V/199V) • 3 Modes — Flow-Through — Pipelined — Burst • Pipelined output mode on both ports allows fast 100-MHz operation • 0.35-micron CMOS for optimum speed/power v • High-speed clock to data access 6.5[1]/7.5[1]/9/12 ns (max.) • 3.
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