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CY7C09169 - 8K/16K x 9 Synchronous Dual-Port Static RAM

Download the CY7C09169 datasheet PDF. This datasheet also covers the CY7C09159 variant, as both devices belong to the same 8k/16k x 9 synchronous dual-port static ram family and are provided as variant models within a single manufacturer datasheet.

Description

The CY7C09159 and CY7C09169 are high speed synchronous CMOS 8K and 16K x 9 dual-port static RAMs.

Two ports are provided, permitting independent, simultaneous access for reads and writes to any location in memory.

Features

  • True Dual-Ported memory cells which allow simultaneous access of the same memory location.
  • 2 Flow-Through/Pipelined devices.
  • 8K x 9 organization (CY7C09159).
  • 16K x 9 organization (CY7C09169).
  • 3 Modes.
  • Flow-Through.
  • Pipelined.
  • Burst.
  • Pipelined output mode on both ports allows fast 100-MHz cycle time.
  • 0.35-micron CMOS for optimum speed/power v.
  • High-speed clock to data access 6.5/7.5/12 ns (max. ).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C09159_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C09449PV-AC 128 Kb Dual-Port SRAM Cypress
CY7C008 64K/128K x 8/9 Dual-Port Static RAM Cypress
CY7C008V 3.3V 64K/128K x 8/9 Dual-Port Static RAM Cypress
CY7C009 64K/128K x 8/9 Dual-Port Static RAM Cypress
CY7C009V 128K x 8 Dual-Port Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C09159 8K/16K x 9 Synchronous Dual-Port Static RAM
CY7C09159AV 3.3-V 8 K x 9 Synchronous Dual Port Static RAM
CY7C09179V (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM
CY7C09189 (CY7C09xx9) 64K/128K x 8/9 Synchronous Dual-Port Static RAM
CY7C09189V (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM

Full PDF Text Transcription

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51 fax id: 5218 PRELIMINARY CY7C09159 CY7C09169 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization (CY7C09159) — 16K x 9 organization (CY7C09169) • 3 Modes — Flow-Through — Pipelined — Burst • Pipelined output mode on both ports allows fast 100-MHz cycle time • 0.35-micron CMOS for optimum speed/power v • High-speed clock to data access 6.5/7.5/12 ns (max.) • Low operating power — Active= 200 mA (typical) — Standby= 0.
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