Datasheet4U Logo Datasheet4U.com

CY3128 - CPLD Development Software

Description

: Graphical HDL Block Diagram editor and a library of blocks from Aldec Aldec Active-HDL™ FSM graphical Finite State Machine editor Behavioral VHDL and Verilog (IFTHENELSE; CASE) Boolean Structural Verilog and VHDL Designs can include multi

Features

  • h S a at . D w w w CY3128 Warp Professional™ CPLD Software.
  • Support for all Cypress Programmable Logic Devices.
  • PSI™ (Programmable Serial Interface™).
  • Delta39K™ CPLDs.
  • Quantum38K™ CPLDs.
  • Ultra37000™ CPLDs.
  • FLASH370i™ CPLDs.
  • MAX340™ CPLDs.
  • Industry standard PLDs (16V8, 20V8, 22V10).
  • VHDL and Verilog timing model output for use with third-party simulators.
  • Active-HDL™ Sim Release 4.1 timing simulation from A.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY3APS Quartz Crystal Low Profile HC49S Leaded Crystal Crystek Corporation
CY3APSMD Quartz Crystal Surface Mount HC49S SMD Crystal Crystek Corporation
CY3AS Quartz Crystal Low Profile HC49S Leaded Crystal Crystek Corporation
CY3ASMD Quartz Crystal Surface Mount HC49S SMD Crystal Crystek Corporation
CY3DMS Quartz Crystal Low Profile HC49S Leaded Crystal Crystek Corporation

Other Datasheets by Cypress (Infineon)

Part Number Description
CY3120 CPLD Development Software for PC
CY3125 CPLD Development Tool for Unix
CY3650 (CY3650 / CY3651) USB Developer Kit
CY3650 USB Development System
CY3651 (CY3650 / CY3651) USB Developer Kit

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
8 m o .c U 4 t e e Features h S a at .D w w w CY3128 Warp Professional™ CPLD Software • Support for all Cypress Programmable Logic Devices — PSI™ (Programmable Serial Interface™) — Delta39K™ CPLDs — Quantum38K™ CPLDs — Ultra37000™ CPLDs — FLASH370i™ CPLDs — MAX340™ CPLDs — Industry standard PLDs (16V8, 20V8, 22V10) • VHDL and Verilog timing model output for use with third-party simulators • Active-HDL™ Sim Release 4.
Published: |