Datasheet4U Logo Datasheet4U.com

CY29350 - 9-Output Clock Driver

Description

The CY29350 is a low-voltage high-performance 200-MHz PLL-based clock driver designed for high speed clock distribution applications.

Features

  • Output frequency range: 25 MHz to 200 MHz.
  • Input frequency range: 6.25 MHz to 31.25 MHz.
  • 2.5V or 3.3V operation.
  • Split 2.5V/3.3V outputs.
  • ±2.5% max Output duty cycle variation.
  • Nine Clock outputs: Drive up to 18 clock lines www. DataSheet4U. com.
  • Two reference clock inputs: Xtal or LVCMOS.
  • 150-ps max output-output skew.
  • Phase-locked loop (PLL) bypass mode.
  • Spread Aware™.
  • Output enable/disable.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY29940 1:18 Clock Distribution Buffer Cypress
CY29FCT520T Multilevel Pipeline Register With 3-State Outputs (Rev. C) ETCTI
CY29FCT52T 8-Bit Registered Transceiver (Rev. A) ETCTI
CY29FCT818T Diagnostic Scan Register With 3-State Outputs (Rev. B) ETCTI
CY20AAJ-8F Nch IGBT for STROBE FLASHER Powerex Power Semiconductors

Other Datasheets by Cypress (Infineon)

Part Number Description
CY29351 9-Output Zero Delay
CY29352 11 Output Zero Delay Buffer
CY2907 Single-PLL General Purpose EPROM Programmable Clock Generator
CY2961 Pentium and Cyrix Compatible Clock Synthesizer / Driver
CY29942 1:18 Clock Distribution Buffer

Full PDF Text Transcription

Click to expand full text
CY29350 2.5V or 3.3V, 200-MHz, 9-Output Clock Driver Features • Output frequency range: 25 MHz to 200 MHz • Input frequency range: 6.25 MHz to 31.25 MHz • 2.5V or 3.3V operation • Split 2.5V/3.3V outputs • ±2.5% max Output duty cycle variation • Nine Clock outputs: Drive up to 18 clock lines www.DataSheet4U.com • Two reference clock inputs: Xtal or LVCMOS • 150-ps max output-output skew • Phase-locked loop (PLL) bypass mode • Spread Aware™ • Output enable/disable • Pin-compatible with MPC9350 • Industrial temperature range: –40°C to +85°C • 32-pin 1.0mm TQFP package Functional Description The CY29350 is a low-voltage high-performance 200-MHz PLL-based clock driver designed for high speed clock distribution applications.
Published: |