AD6684 Datasheet 135MHz Quad IF Receiver

Manufacturer: Analog Devices

Datasheet Details

Data Sheet 135 MHz Quad IF Receiver AD6684.

JESD204B (Subclass 1) coded serial digital outputs Lane rates up to 15 Gbps 1.68 W total power at 500 MSPS 420 mW per analog-to-digital converter (ADC) channel SFDR = 82 dBFS at 305 MHz (1.8 V p-p input range) SNR = 66.8 dBFS at 305 MHz (1.8 V p-p input range) Noise density =.
151.5 dBFS/Hz (1.8 V p-p input range) Analog input buffer On-chip dithering to improve small signal linearity Flexible differential input range 1.44 V p-p to 2.16 V p-p (1.80 V p-p nominal) 82 dB channel isolation/.

Part Number	Description
AD668	12-Bit Ultrahigh Speed Multiplying D/A Converter
AD660	Monolithic 16-Bit Serial/Byte DACPORT
AD6600	Dual Channel/ Gain-Ranging ADC with RSSI
AD6620	65 MSPS Digital Receive Signal Processor
AD6622	Four-Channel/ 75 MSPS Digital Transmit Signal Processor TSP
AD6623	4-Channel/ 104 MSPS Digital Transmit Signal Processor TSP
AD6624	80 MSPS Digital Receive Signal Processor
AD6630	Differential/ Low Noise IF Gain Block with Output Clamping
AD6633	Multichannel Digital Upconverter
AD6634	80 MSPS/ Dual-Channel WCDMA Receive Signal Processor (RSP)