AD6620 - 65 MSPS Digital Receive Signal Processor

Analog Devices

Datasheet Details

Part number	AD6620
Manufacturer	Analog Devices
File Size	354.46 KB
Description	65 MSPS Digital Receive Signal Processor
Datasheet	AD6620 Datasheet

General Description

REAL, DUAL REAL, OR COMPLEX INPUTS 65 MSPS Digital Receive Signal Processor AD6620 FUNCTIONAL BLOCK DIAGRAM I CIC FILTERS I FIR FILTER I OUTPUT FORMAT SERIAL OR PARALLEL OUTPUTS Q COS –SIN Q Q COMPLEX NCO EXTERNAL SYNC CIRCUITRY JTAG PORT ␮P OR SERIAL CONTROL both narrowband and wideband carriers to be extracted.

The RAM-based architecture allows easy reconfiguration for multimode applications.

The decimating filters remove unwanted signals and noise from the channel of interest.

Overview

Key Features

High Input Sample Rate 65 MSPS Single Channel Real 32.5 MSPS Diversity Channel Real 32.5 MSPS Single Channel Complex NCO Frequency Translation Worst Spur Better than.
100 dBc Tuning Resolution Better than 0.02 Hz 2nd Order Cascaded Integrator Comb FIR Filter Linear Phase, Fixed Coefficients Programmable Decimation Rates: 2, 3 . . . 16 5th Order Cascaded Integrator Comb FIR Filter Linear Phase, Fixed Coefficients Programmable Decimation Rates: 1, 2, 3 . . . 32 Programmable Decimating RAM.

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