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AT24C256B - Two-wire Serial EEPROM

General Description

The AT24C256B provides 262,144 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 32,768 words of 8 bits each.

The device’s cascadable feature allows up to eight devices to share a common two-wire bus.

Key Features

  • Low-voltage and Standard-voltage Operation.
  • 1.8 (VCC = 1.8V to 5.5V).
  • Internally Organized as 32,768 x 8.
  • Two-wire Serial Interface.
  • Schmitt Trigger, Filtered Inputs for Noise Suppression.
  • Bidirectional Data Transfer Protocol.
  • 1 MHz (5.0V, 2.7V, 2.5V), and 400 kHz (1.8V) Compatibility.
  • Write Protect Pin for Hardware and Software Data Protection.
  • 64-byte Page Write Mode (Partial Page Writes Allowed).
  • Self-t.

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Full PDF Text Transcription for AT24C256B (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for AT24C256B. For precise diagrams, and layout, please refer to the original PDF.

Features • Low-voltage and Standard-voltage Operation – 1.8 (VCC = 1.8V to 5.5V) • Internally Organized as 32,768 x 8 • Two-wire Serial Interface • Schmitt Trigger, Filte...

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zed as 32,768 x 8 • Two-wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bidirectional Data Transfer Protocol • 1 MHz (5.0V, 2.7V, 2.5V), and 400 kHz (1.