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LP61L256B - 32K X 8 Bit High SPEED LOW VCC CMOS SRAM

General Description

The LP61L256B is a high-speed, low-power 262,144-bit static random access memory organized as 32,768 words by 8 bits that operates on a single 3.3V power supply.

Input and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Key Features

  • n Single +3.3 volt power supply n Access times: 12 ns (max. ) n Current: Operating: 100mA (max. ) Standby: 10mA (max. ) n Full static operation, no clock or refreshing required n n n n All inputs and outputs directly TTL compatible Common I/O using three-state output Data retention voltage: 2V (min. ) Available in 28-pin SOJ and TSOP packages General.

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Datasheet Details

Part number LP61L256B
Manufacturer AMIC Technology
File Size 132.65 KB
Description 32K X 8 Bit High SPEED LOW VCC CMOS SRAM
Datasheet download datasheet LP61L256B Datasheet

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Other Datasheets by AMIC Technology

Part Number Description
LP61L256C 32K X 8 BIT HIGH SPEED CMOS SRAM
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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LP61L256B Series 32K X 8 Bit High SPEED LOW VCC CMOS SRAM Features n Single +3.3 volt power supply n Access times: 12 ns (max.) n Current: Operating: 100mA (max.) Standby: 10mA (max.) n Full static operation, no clock or refreshing required n n n n All inputs and outputs directly TTL compatible Common I/O using three-state output Data retention voltage: 2V (min.) Available in 28-pin SOJ and TSOP packages General Description The LP61L256B is a high-speed, low-power 262,144-bit static random access memory organized as 32,768 words by 8 bits that operates on a single 3.3V power supply. Input and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.