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SLF006 - CMOS Gate Array

Download the SLF006 datasheet PDF. This datasheet also covers the SLF001 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

Description

SLF00x is a family of static, master-slave, multiplexed scan latch, D flip-flops.

When SCE is low it is a D flip-flop with the output buffered and changes state on the rising edge of the clock.

When SCE is high it is a D latch that is transparent when C is low.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SLF001-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SLF006
Manufacturer AMI
File Size 48.86 KB
Description CMOS Gate Array
Datasheet download datasheet SLF006 Datasheet

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Other Datasheets by AMI

Part Number Description
SLF001 CMOS Gate Array
SLF002 CMOS Gate Array
SLF004 CMOS Gate Array
SLF011 CMOS Gate Array
SLF012 CMOS Gate Array

Full PDF Text Transcription

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Core Logic 6/)[ ® $0,+*  PLFURQ &026 *DWH $UUD Description SLF00x is a family of static, master-slave, multiplexed scan latch, D flip-flops. When SCE is low it is a D flip-flop with the output buffered and changes state on the rising edge of the clock. When SCE is high it is a D latch that is transparent when C is low. Logic Symbol SLF00x DQ C SD SE SCE Truth Table C ↑ ↑ ↑ ↑ L L L L L H D SD SE SCE Q HXL LH LXLLL XHH L H XLHL L X X X L NC HX LHH LXLHL XHHHH X LHHL X X X H NC NC = No Change HDL Syntax Verilog .................... SLF00x inst_name (Q, C, D, SCE, SD, SE); VHDL...................... inst_name: SLF00x port map (Q, C, D, SCE, SD, SE); Pin Loading Pin Name C D SD SE SCE SLF001 1.0 1.0 1.0 2.1 2.1 Equivalent Loads SLF002 SLF004 1.0 1.0 1.0 1.0 1.0 1.0 2.1 2.
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