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IDCX6 - CMOS Gate Array

Download the IDCX6 datasheet PDF. This datasheet also covers the IDCX3 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

IDCXx is a family of non-inverting, CMOS-level input buffer pieces.

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Note: The manufacturer provides a single datasheet file (IDCX3-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDCX6
Manufacturer AMI
File Size 18.23 KB
Description CMOS Gate Array
Datasheet download datasheet IDCX6 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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,'&;[ $0,+*  PLFURQ &026 *DWH $UUD Description IDCXx is a family of non-inverting, CMOS-level input buffer pieces. Logic Symbol Truth Table IDCXx QC P PADM D PADM QC LL HH HDL Syntax Verilog .................... IDCXx inst_name (QC, PADM); VHDL...................... inst_name: IDCXx port map (QC, PADM); Pin Loading Pin Name PADM (pF) Load IDCX3 IDCX6 4.90 4.90 Power Characteristics Cell Equivalent Gates IDCX3 IDCX6 0.0 0.0 a. See page 2-15 for power equation. Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-load) 10.4 TBD 18.1 Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.0V, Typical Process Number of Equivalent Loads 1 IDCX3 From: PADM To: QC tPLH tPHL 0.63 0.