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74AHC1G79 - Single D-type flip-flop

General Description

The 74AHC1G79; 74AHCT1G79 is a single positive-edge triggered D-type flip-flop.

Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.

Inputs are overvoltage tolerant.

Key Features

  • Wide supply voltage range from 2.0 to 5.5 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • CMOS low power dissipation.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level A.
  • Symmetrical output impedance.
  • Balanced propagation delays.
  • Input levels:.
  • For 74AHC1G79: CMOS level.
  • For 74AHCT1G79: TTL level.
  • ESD protection:.
  • HBM JESD22-A114F: exceeds 2000 V.
  • MM JE.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74AHC1G79; 74AHCT1G79 Single D-type flip-flop; positive-edge trigger Rev. 8 — 11 January 2022 Product data sheet 1. General description The 74AHC1G79; 74AHCT1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 to 5.5 V • Overvoltage tolerant inputs to 5.