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SN74LVC2G132 - Dual 2-Input NAND Gate

SN74LVC2G132 Description

SN74LVC2G132 www.ti.com SCES547D * FEBRUARY 2004 * REVISED DECEMBER 2013 Dual 2-Input NAND Gate With Schmitt-Trigger Inputs Check f.
This dual 2-input NAND gate with Schmitt-trigger inputs is designed for 1.

SN74LVC2G132 Features

* 1
* 2 Available in Texas Instruments NanoFree™ Package
* Supports 5-V VCC Operation
* Inputs Accept Voltages to 5.5 V
* Max tpd of 5.3 ns at 3.3 V
* Low Power Consumption, 10-μA Max ICC
* ±24-mA Output Drive at 3.3 V
* Typical VOLP (Output Groun

SN74LVC2G132 Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. DCT PACKAGE (TOP VIEW) 1A 1 1B 2 2Y 3 8 VCC 7 1Y 6 2B 1A 1B 2Y GND DCU PACKAGE (TOP VIEW) 18 27 36 45 VCC 1Y 2B 2A YZP PACKAGE (BOTTOM VIEW) GND 4 5 2A 2Y 3 6

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Dual 2-Input NAND Gate Texas Instruments
Texas Instruments SN74LVC2G132-like datasheet