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SN74LVC1G79-EP - Single Positive-Edge-Triggered D-Type Flip-Flop

Description

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse.

Features

  • 1.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Max tpd of 5 ns at 3.3 V.
  • Low Power Consumption, 10-µA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Protection Exceeds JESD 22.
  • 2000-V Human-Body Model (A114-A).
  • 200-V Machine Model (A115-A).
  • 1000-V Charged-Device Model (C101) SUP.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74LVC1G79-EP www.ti.com....................................................................................................................................................... SCES646A – AUGUST 2005 – REVISED APRIL 2009 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP FEATURES 1 • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 5 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.
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