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SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop

SN74LVC112A Description

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVC112A SCAS289M * JANUARY 1993 * REVISE.
This dual negative-edge-triggered J-K flip-flop is designed for 1.

SN74LVC112A Features

* 1 Operates From 1.65 V to 3.6 V
* Inputs Accept Voltages to 5.5 V
* Max tpd of 4.8 ns at 3.3 V
* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
* Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
* Latch-Up Pe

SN74LVC112A Applications

* Servers
* PCs
* Notebooks
* Network switches
* Toys
* I/O Expanders

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Dual Negative-Edge-Triggered J-K Flip-Flop Texas Instruments
Texas Instruments SN74LVC112A-like datasheet