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SN74LV11A TRIPLE 3-INPUT POSITIVE-AND GATES

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Description

SN54LV11A, SN74LV11A TRIPLE 3ĆINPUT POSITIVEĆAND GATES D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.
ordering information These triple 3-input positive-AND gates are designed for 2-V to 5.

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Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. SCES345D
* DECEMBER 2000
* REVISED APRIL 2005 SN54LV11A . . . J OR W PACKAGE SN74LV11A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 1A 1B 2A 2

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