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SN74AUC2G00 DUAL 2-INPUT POSITIVE-NAND GATE

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Description

www.ti.com SN74AUC2G00 DUAL 2-INPUT POSITIVE-NAND GATE SCES440C * MAY 2003 * REVISED JANUARY 2007 .
ORDERING INFORMATION This dual 2-input positive-NAND gate is operational at 0.

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Features

* Available in the Texas Instruments NanoFree™ Package
* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V Operable
* Max tpd of 1.2 ns at 1.8 V DCT PACKA

Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. TA
* 40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE PART NUMBER NanoFree™
* WCSP (DSBGA) 0.23-mm Large Bump
* YZP (Pb-free) Reel

SN74AUC2G00 Distributors

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