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SN74AUC1G74 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SN74AUC1G74 Description

www.ti.com SN74AUC1G74 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCES537D * DECEMBER 2003 * REVISED JUNE .
ORDERING INFORMATION This single positive-edge-triggered D-type flip-flop is operational at 0.

SN74AUC1G74 Features

* Available in the Texas Instruments NanoFree™ Package
* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V Operable
* Max tpd of 1.5 ns at 1.8 V DCT PACK

SN74AUC1G74 Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and

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SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP Texas Instruments
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