Datasheet4U Logo Datasheet4U.com

SN74AUC1G00 - SINGLE 2-INPUT POSITIVE-NAND GATE

Description

This single 2-input positive-NAND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

B or Y = A + B in positive logic.

Features

  • Available in the Texas Instruments NanoFree™ Package.
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Sub 1-V Operable.
  • Max tpd of 2.2 ns at 1.8 V.
  • Low Power Consumption, 10-µA Max ICC.
  • ±8-mA Output Drive at 1.8 V.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Protection Exceeds JESD 22.
  • 2000.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SN74101 AND-OR Gate ETC
SN74102 AND Gate ETC
SN74103 Dual J-K Flip-Flop ETC
SN74106 Dual J-K Flip-Flop ETC
SN74108 Dual J-K Flip Flop ETC

Other Datasheets by Texas Instruments

Part Number Description
SN74AUC1G02 SINGLE 2-INPUT POSITIVE-NOR GATE
SN74AUC1G04 Single Inverter Gate
SN74AUC1G06 SINGLE INVERTER BUFFER/DRIVER
SN74AUC1G07 Single Buffer/Driver
SN74AUC1G08 Single 2-Input Positive-AND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.ti.com SN74AUC1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCES368O – SEPTEMBER 2001 – REVISED JANUARY 2007 FEATURES • Available in the Texas Instruments NanoFree™ Package • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Partial-Power-Down Mode Operation • Sub 1-V Operable • Max tpd of 2.2 ns at 1.8 V • Low Power Consumption, 10-µA Max ICC • ±8-mA Output Drive at 1.
Published: |