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CDCV855I - 2.5-V PHASE-LOCK LOOP CLOCK DRIVER

Download the CDCV855I datasheet PDF. This datasheet also covers the CDCV855 variant, as both devices belong to the same 2.5-v phase-lock loop clock driver family and are provided as variant models within a single manufacturer datasheet.

Description

The CDCV855 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to four differential pairs of clock outputs (Y[0:3], Y[0:3]) and one differential pair of feedback clock outputs (FBOUT, FBOUT).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CDCV855-etcTI.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Texas Instruments

Part Number Description
CDCV855 2.5-V PHASE-LOCK LOOP CLOCK DRIVER
CDCV850 2.5-V Phase Lock Loop Clock Driver
CDCV850I 2.5-V Phase Lock Loop Clock Driver
CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER
CDCV857B 2.5-V PHASE LOCK LOOP CLOCK DRIVER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CDCV855, CDCV855I 2.5-V PHASE-LOCK LOOP CLOCK DRIVER D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications D Spread Spectrum Clock Compatible D Operating Frequency: 60 MHz to 180 MHz D Low Jitter (cyc–cyc): ±50 ps D Distributes One Differential Clock Input to Four Differential Clock Outputs D Enters Low Power Mode and Three-State Outputs When Input CLK Signal Is Less Than 20 MHz or PWRDWN Is Low D Operates From Dual 2.
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