PXM-UIO96-2 - 96-Line Digital I/O

PXM-UIO96-2 Datasheet Preview — Preview of PXM-UIO96-2 PDF

Datasheet Details

Part number	PXM-UIO96-2
Manufacturer	WinSystems
File Size	181.55 KB
Description	96-Line Digital I/O
Datasheet	PXM-UIO96-2-WinSystems.pdf

PXM-UIO96-2 Product details

Description

PXM-UIO96-2 Block Diagram WinSystems | 715 Stadium Drive, Arlington, TX 76011 USA | Tel 817-274-7553 | Info@WinSystems.com | www.WinSystems.com PXM-UIO96-2; 96-Line Digital I/O SUMIT-ISM Module It directly interfaces to WinSystems’ ISM-TRM-ISO-IN and ISM-TRM-ISO-OUT modules.The controller connects directly to the stackable PCIe x1 lane on the SUMIT-A connector.Event Sense Operation - The Lattice FPGA supports 96 event sense lines to generate an interrupt when an event occurs.This means tha

Features

SUMIT-ISM module with PCIe x1 lane.
Supports 96 digital I/O lines.
Each line is capable of:.
Bidirectional operation.
Input, Output, or Output with Read back.
12mA Sink Current.
Generates an interrupt on signal change-of-state.
Support for all of the 96 event sense lines.
Software selectable edge polarity.
Software enabled interrupt for each line.
Change-of-state latched for each line.
Wr.

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Published: Aug 6, 2014 |